Research Topics
Embedded into the cluster of excellence cfaed, the Carbon path is aiming at establishing a sustainable research platform for carbon based electronics with focus on a CNTFET technology for wireless communication systems. Extensive and complementary multi-disciplinary competences at TU Dresden and TU Chemnitz are combined covering materials science, multi-scale device modeling, RF circuit design and fabrication, and wireless communications. In particular in the group “CNT integration and applications” at the ZfM we focus on developing a wafer level technology for CNTFET fabrication.
The goal of the technology development (subproject TP5, 2011-2014) in the DFG Research Unit 1713 „Sensoric Micro and Nano Systems“ was a scalable integration of semiconducting CNTs on wafer scale. The aligned deposition of CNTs and the contact formation with the electrodes was considerably improved. The integration in a M(N)EMS was proven for realization of a piezoresistive sensor. Further, a procedure for functionalization of CNTs with metal nanoparticles based on flow chemistry was realized (see figure), aiming for optoelectronic devices with a high integration density.
Within the International Research Training Group “Materials and Concepts for Advanced Interconnects and Nanosystems”, Atomic Layer Deposition (ALD) is a field of intense research. In cooperation with the Chair Inorganic Chemistry at TU Chemnitz, new precursors and ALD processes based thereon are developed. The work focuses on processes for metals, but also metal nitrides and oxides are of interest. Three PhD students are working on this topic which also includes studies by in-situ X-ray photoelectron spectroscopy for surface chemistry and film composition.
As project partner together with GLOBALFOUNDRIES and Fraunhofer IPMS-CNT in the joint R&D project ”BENGALOS” (funded by SMWK/SAB), the ZfM investigated three tasks: (1) alternative low-k integration (see scientific report page 30), (2) Cu / low-k compatible wet cleaning process after patterning of the porous dielectric using a TiN hardmask and (3) plasma induced damage (PID) of gate isolators by BEOL processing.
Magnetoresistive layer stacks need to be patterned for application in GMR based sensor systems developed in the
subproject A of the competence network for nano system integration “nanett”. These layer stacks consist of multilayers like [4.2 nm Pt/ 4x(0.8 nm Pt/0.4 nm Co)/1.5 nm Cu/1.6 nm Co/3 nm Pt], which are difficult to pattern by RIE because of the different materials and as Pt does not form volatile compounds at low temperatures. Therefore, an Ar sputter etch process has been developed for patterning using a Ta hardmask.
Research topics of the Honorary Professorship Nanoelectronics Technologies are:
