BEGIN:VCALENDAR
VERSION:2.0
PRODID:TU Chemnitz
METHOD:PUBLISH
X-WR-CALNAME:Veranstaltungen der TU Chemnitz
X-WR-TIMEZONE:Europe/Berlin
BEGIN:VEVENT
CLASS:PUBLIC
DTSTART;TZID="Europe/Berlin":20140324T103000
DTEND;TZID="Europe/Berlin":20140324T114500
LOCATION:Reichenhainer Str. 70\, Chemnitz (Weinhold-Bau)
SUMMARY:Fakultätskolloquium: "VLSI Design Verification: Challenges and State-of-the-art" (Fakultät für Elektrotechnik und Informationstechnik)
DESCRIPTION:In this talk\, Prof. Tahar will discuss "VLSI Design Verification". Verification is known to cost about 70% of VLSI design projects resources. Different kinds of modern verifications methods used in VLSI design will be presented and compared.\nDr. Sofiene Tahar\nProf. Dr. –Ing. Olfa Kanoun\, olfa.kanoun@etit.tu-chemnitz.de
ORGANIZER:MAILTO:paul.winkler@etit.tu-chemnitz.de
UID:15887@www.tu-chemnitz.de
CREATED:20140314T085500Z
DTSTAMP:20210802T190808Z
END:VEVENT
END:VCALENDAR