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Article

2000


André Windisch and Schneider and Mades and Dieter Monjau and Manfred Glesner and Hammer and Wolfgang Ecker
Eine flexible Simulationsumgebung für System-On-Chip Design
IN Informationstechnik und Technische Informatik (it+ti), page 43 - 53, Oldenbourg Verlag, München, Deutschland, 2000.

InProceedings

2000


Schneider and Mades and Manfred Glesner and André Windisch and Wolfgang Ecker
An Open VHDL-AMS Simulation Framework
IN IEEE/ACM International Workshop on Behavioral Modeling and Simulation (BMAS 2000), page 89 - 94, IEEE Computer Society, October 2000. ISBN: 0-7695-0893-6

Karayiannis and Mades and André Windisch and Schneider and Wolfgang Ecker
Using XML for Represantation and Visualization of Elaborated VHDL-AMS Models
IN Proceedings of the VHDL International Users Forum (VIUF), page 83 - 87, IEEE Computer Society, October 2000. ISBN: 0-7695-0890-1

Wolfgang Ecker and André Windisch and Mades and Schneider and Yang
Gated Clocks in RT-Synthesis and Simulation
IN Proceedings of the VHDL International Users Forum (VIUF), page 59 - 63, IEEE Computer Society, October 2000. ISBN: 0-7695-0890-1

Schneider and Mades and André Windisch and Manfred Glesner and Wolfgang Ecker
Anatomy of a VHDL-AMS Environment.
IN Proceedings of the Forum on Design Languages (FDL), page 159 - 165, September 2000. ISBN: 3-0000-6540-7

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