Hardware Development with VHDL
The paradigms and concepts to implement functionalities as combinatorial or sequential digital system are different from the concepts of imperative programming languages. This course outlines paradigms of hardware development and compares it to the concepts of imperative programming languages. VHDL is used as modelling language of sequential digital systems.
Main topics are:
- VHDL basics (concepts, syntax, semantics)
- Comparison to imperative programming languages
- Combinatorial systems and its modelling
- Sequential systems and its modelling
- Components of register-transfer level and its VHDL modelling
- Modelling and implementation of complex systems
- Best practice in VHDL modelling
The usage of development tools for simulation and synthesis is teached as well.