Content

1. Introduction
1.1 Structure of the Exercises
1.2 Style Guide
1.3 Design Structure
2. VHDL Working Environment
2.1 Directory Structure
2.2 Working Environment
2.2.1 Simulation Setup
2.2.2 Synthesis Setup
2.3 VHDL Code
2.4 VHDL Compiler
2.5 VHDL Simulator
2.6 VHDL Synthesis
3. exercises
3.1 STEP 1: A Multiplexer
3.1.1 Synopsis
3.1.2 Implementation
3.1.3 Results
3.2 STEP 2: Extending the Multiplexer
3.2.1 Synopsis
3.2.2 Implementation
3.3 STEP 3: A 7-Segment Display Driver
3.3.1 Synopsis
3.3.2 Implementation
3.4 STEP 4: A Three Digit 7-Segment Display Driver
3.4.1 Synopsis
3.4.2 Implementation
3.5 STEP 5: A Decoder
3.5.1 Synopsis
3.5.2 Implementation
3.6 STEP 6: A Register
3.6.1 Synopsis
3.6.2 Implementation
3.7 STEP 9: A State Machine for the Display
3.7.1 Synopsis
3.7.2 Implementation
3.8 STEP 7: A Timer
3.8.1 Synopsis
3.8.2 Implementation
3.9 STEP 8: A BCD-Counter
3.9.1 Synopsis
3.9.2 Implementation
3.10 STEP 9: A State Machine for the Main Controller
3.10.1 Synopsis
3.10.2 Implementation
3.11 STEP 10: The Camera
3.11.1 Synopsis
3.11.2 Implementation