A generated model is executed by elaborating the user-specified processes .
Within the draft hierarchy the core process
monitors and coordinates during simulation the activities of all processes provided by the user,
has signal values transferred and the values of implicitly defined values, such as S`Stable(t), updated,
registers events and has suitable processes carried out in response to these events; it seizes one variable each with the actual value of every signal which is explicitly declared within the model and provides the variable`s value for all calculations using the signal,
updates the variables` values mentioned above at regular intervals during the simulation cycle.,
seizes one variable each with the actual value of every implicitly declared guarded signal and provides one driver and the one variable which contains the actual value for
S'Stable(t)-signals,
S'Quiet(t)-signals,
S'Transaction-signals and
prefixes S and times t used within the model.
As simulation time passes on the signal form within the waveform receive the values of the corresponding drivers. A driver is active when it is assigned a new value. A signal is active , if
one of the signal sources is active,
one of the sub-elements is activated,
the signal is used in the formal part of an element in a port-concatenation list and the actual part is active or if
the signal is a sub-element of an active resolved signal.
If a compound-type signal has a source which is based on another type every scalar sub-element is considered active if the signal source is activated.
The same is valid for ports and for signals linked to them. An implicitly defined signal is active if this signal is updated by the core process. If a signal is not active it is called quiet .
For certain signals the
core process
monitors two different signal values. The
driver value
is the value of a signal which serves as a source for other signals. The effective value is the value determined by calculating the signal relations within an expression. The driver value and the effective value are not identical above all when a resolution function or type conversions are involved. The following table shows the particularities of both signal types.
When a signal is updated the core process at first calculate the driver value and the effective value, then the variable belonging to the signal is newly seized. If the signal is not derived from an array-type the effective value is used. It is checked whether this value belongs to the signal`s subtype. The variable which stores the actual value receives the effective value by assignment. If the signal is based on an a rray-type the effective value is transformed implicitly into the signal`s subtype (including a consistency test between the signal elements and the elements of the effective value). The result of the type conversion is assigned to the variable mentioned above.
The core process links the values of implicitly defined guarded signals to a block statement which contains a guarded expression. At the same time the system updates the implicit signals S'Stable(t), S'Quiet(t) and S'Transaction as well as their drivers.
A guarded signal is changed in its current values only if the corresponding guarded expression is related to the signal and the signal is active. When this is done the expression`s value is calculated and assigned to the variable which contains the signal`s actual value.
The signals S'Stable(t), S'Quiet(t) and S'Transaction have the following special characteristics.
The current value of an implicit value D depends on the current value of another signal E if
D is a guarded signal and E appears within the guarded expression which determines the current value of D
D is of the type S'Stable(t), S'Quiet(t) or S'Transaction.
Within a simulation cycle the current value of E is updated in time before the current value of D, thus the principle of causality is valid.
A model is executed by repeatedly executing process statements from the level of model description. One repetition is called a simulation cycle. Within a cycle all signal values are calculated. Depending on that the system starts executing process statements, i.e., if an event occurs at a signal all processes which are sensitive to this signal are started. The execution is preceded by an initialisation which consists of the following steps:
The simulation`s start is usually assigned the time 0 ns.
The simulation cycle consists of the following parts:
Next time at which a driver becomes active
Next time at which a process resumes
If this time equals the current simulation time a new delta cycle is started.